Single-chip physical-layer interface devices to make the most of transmission speed introduced by Microchip
CHANDLER, Ariz. – Microchip Technology Inc. in Chandler, Ariz., is introducing single-chip physical-layer interface devices to include features that streamline machine vision design, make the most of transmission speed, and simplify deployment in industrial inspection and imaging applications.
Until the 12.5-gigabit-per-second CoaXPress 2.0 interface standard was ratified last year, machine-vision image-capture solutions had replaced conveyor belts as the primary roadblock to speeding production-line throughput.
Microchip's EQCO125X40 family of CoaXPress devices implement the CXP 2.0 standard, starting from a new backward-compatible design based on the specification, with an integrated clock data recovery (CDR) at all speed levels and a camera-side clock to support the demands of real-world environments.
The devices increase machine-vision processing throughput by enabling cameras and capture cards to transmit four to eight times faster than alternative solutions. In addition, these devices enable four times the cable and link distance with much lower power and near-zero latency.
For card makers, Microchip's new offering makes it easier and less expensive to develop products, which enable pre-setup and real-time cable link quality tests.
Microchip's CXP devices enable manufacturers to get the same throughput from two ports on cameras and frame grabbers as they previously could with four.
The Microchip CoaXPress 2.0 family includes a transmitter-only camera-side device and three single-chip transceiver options. Each is packaged in a 16-pin quad-flat no-leads package and is backward-compatible with Microchip's CoaXPress 1.1 family of devices.
For more information contact Microchip Technology online at www.microchip.com.
