Pentek receiver board heads for SIGINT applications

Nov. 1, 1998
UPPLE SADDLE RIVER, N.J. - Engineers at Pentek Inc. used RACEway technology from Mercury Computer Systems in Chelmsford, Mass., to design a narrowband VME digital receiver board for wireless communications and signals intelligence applications.

By John McHale

UPPLE SADDLE RIVER, N.J. - Engineers at Pentek Inc. used RACEway technology from Mercury Computer Systems in Chelmsford, Mass., to design a narrowband VME digital receiver board for wireless communications and signals intelligence applications.

The Model 6526 is a 16-channel, 2-input, single-slot 6U VME board with front-panel connections for input clock, data, and synchronization and time-code stamping of data. It includes a 32-bit VMEbus slave interface for control and status.

Information can flow over a radio to several digital signal processors (DSPs) for analysis, says Rodger Hosking, vice president of Pentek in Upper Saddle River, N.J. The DSPs can be assigned certain tasks, and can be reconfigured easily through a "network of crosspoint switches on a backplane that enables a user to route a signal to multiple boards at the same time," he adds.

The system enables three simultaneous conversations at once through the three in and out signals, which increases the bandwidth of the RACEway fabric, Hosking explains.

"The data processed by the digital receiver board can be routed through the 16 channels over RACEway to any DSP board for analysis of Fast Fourier Transfers, decryption, beamforming, or direction finding," Hosking says. The Pentek device is also used in medical imaging and analysis of many forms of radar or sonar signals.

The Model 6526 uses four GC4014 Quad narrowband digital receiver chips from Graychip in Palo Alto, Calif., to provide a total of 16 receiver channels, Hosking says. Two front-panel data inputs are accepted on a multi-pin ribbon cable connector.

The parallel inputs operate at either TTL or differential ECL logic levels and support as much as 16 bits of data and one clock at sampling rates as fast as 62.5 MHz for ECL and as fast as 50 MHz for TTL. Each chip accepts all four front-panel inputs through an internal crossbar switch that enables each receiver channel to independently source data from any of these four inputs.

A 32-bit time code generator time-stamps data packets from the receivers and determines when input switching commands are performed.

A front-panel sync bus consisting of a parallel multiconductor ribbon cable, bridges across all Model 6526s in a system and uses the same style connectors as the visual inputs. A VME-controlled sync generator generates sync signals for output to the sync bus.

The channel formatter also stores the RACEway routing code and RACEway address for each channel in VME- programmable registers, enabling each channel`s packet to be directed to any RACEway board, then steered to any resource within the board.

The Model 6526 is directly compatible with the Pentek Models 4290 and 4291 Quad TMS320C6x DSP processors with their optional RACEway interfaces.

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