IARPA seeks to move high-performance computing beyond CMOS and floating point
WASHINGTON, 14 March 2013. Government computer scientists are asking industry for information that could lead to new levels of computational performance with dramatically lower power, space, and cooling requirements than the high-performance computing (HPC) systems of today.
Officials of the Intelligence Advanced Research Projects Agency (IARPA) in Washington issued a request for information Friday (IARPA-RFI-13-02) for the Novel Technologies for High Performance Computing program, which also seeks to broaden the definition of HPC beyond today's floating point benchmarks.
IARPA officials are attempting to gather information for a future program that could involve formal solicitations to industry for advanced computer research. IARPA is the is the research arm of the U.S. Office of the Director of National Intelligence.
Systems designers always have demanded increases in computing power, which has helped drive decades of dramatic increases in HPC capability, IARPA officials explain.
Today's most powerful computer delivers 17.6 petaflops per second, while consuming 8.2 megawatts of power. A petaflop is a quadrillion floating point operations (FLOP) per second; a quadrillion is a thousand trillion.
The U.S. Department of Energy's Exascale Computing Initiative, for example, aims to achieve HPC performance of 1 exaflop per second using about 20 megawatts of power within a decade. An exaflop is a quintillion floating point operations per second -- or a billion-billion FLOPs per second (10 to the eighteenth power).
The computing power behind today's most power high-performance machines is the complementary metal oxide silicon semiconductor (CMOS), yet IARPA researchers are asking industry to look not only beyond conventional CMOS computer technology, but also beyond the floating point operations per second benchmark.
Looking at fast computers in terms of FLOPs per second have constrained the technology and architecture options for HPC system designers. The HPC benchmarking community has come up with some alternative computing and benchmarking technologies, but none have made the technical advances necessary to compete with the mature HPC industry.
IARPA's RFI is asking industry to illuminate the breadth of technologies that offer the potential to build HPC systems to address hard computational challenges in the future, particularly where today's HPC benchmarks do not represent those challenges.
IARPA is asking industry for information that focuses on a specific technology. Responses should include a description of the technical area; an assessment of its maturity level, technical challenges, and current research; a list of potential applications, with benchmarks and metrics; computation models; commercial possibilities; and the time it would take to develop these new technologies.
Based on these responses, IARPA may schedule an industry workshop later this spring focused on novel technologies for high performance computation, officials say.
Companies interested should respond by email no later than 5 April 2013 to [email protected]. Email questions or concerns to [email protected].
More information is online at https://www.fbo.gov/notices/4b4d5695ac4c9ff5d53bb78b8ef33bd2.
John Keller | Editor
John Keller is editor-in-chief of Military & Aerospace Electronics magazine, which provides extensive coverage and analysis of enabling electronic and optoelectronic technologies in military, space, and commercial aviation applications. A member of the Military & Aerospace Electronics staff since the magazine's founding in 1989, Mr. Keller took over as chief editor in 1995.
