VXS and VME A/D converter board with two 12-bit A/D channels at 3.2 gigasamples per second introduced by TEK Microsystems

CHELMSFORD, Mass., 13 May 2010. TEK Microsystems Inc. in Chelmsford, Mass., is introducing the Calypso-V5 A/D converter board for signals acquisition, which is compatible with legacy VME systems as well as newer VITA 41 VXS based systems, and supports either two 12-bit analog-to-digital converter channels at 3.2 gigasamples per second or six channels at 1.6 gigasamples per second.

The Calypso-V5, a member of Tekmicro's QuiXilica-V5 VXS family, combines high density FPGA processing with ultra wide band A/D converter signal acquisition.

Calypso-V5 is based on National Semiconductor A/D converter device which supports either a pair of channels in non-interleaved mode or one channel using 2:1 interleaved sampling. Calypso-V5 contains four A/D converter devices, supporting either six channels plus trigger at 1.6-gigasamples-per-second or two channels plus trigger at 3.2-gigasamples-per-second.

In all modes, the converters provide 12-bit resolution and open analog bandwidth exceeding 2 GHz. This allows Calypso-V5 to be used as a 3.2-gigasamples-per-second converter for 1st Nyquist applications or as a high density multichannel building block for lower bandwidth applications using either 1st or 2nd Nyquist sampling.

The Calypso-V5 contains four separate A/D converter devices, with each pair of devices assigned to its own front end FPGA for signal processing. In the QuiXilica-V5 family, the front end FPGA is typically a Xilinx Virtex-5 SX95T-2 FPGA device. Future QuiXilica products later in 2010 will offer higher density Virtex-6 FPGA options including LX240T, SX315T and SX475T devices.

The two front end FPGAs are supplemented with a backend FPGA which can be used for additional processing or for backplane or front panel communications. In the QuiXilica-V5 family, the backend FPGA can be configured with a range of Xilinx Virtex-5 FPGA options, from the standard LX110T-2 up to a LX330T, FX200T, or SX240T, depending on application requirements.

The Calypso-V5 includes six banks of DDR3 memory with total capacity of 6 gigabytes and aggregate throughput of 38+ gigabytes per second, supporting a wide range of signal processing algorithms with deep memory buffering of the entire signal acquisition stream. Each FPGA supports a Gigabit Ethernet interface for control plane purposes, along with a range of front panel and backplane I/O connections for high speed communications with other processing cards.

The Calypso-V5 is available for a wide range of operating environments, including commercial grade, rugged air and conduction cooled, allowing the card to be used for laboratory and deployed requirements in both VME and VXS systems. For more information contact TEK Microsystems online at www.tekmicro.com.