JEDEC e MMC v4.5 standard seeks to boost embedded computing by improving processor-memory interaction

ARLINGTON, Va., 16 June 2011. A new microelectronics industry standard aimed at enhancing overall embedded computing system performance and reliability by improving how the host processor and memory interact at the interface, configuration, and protocol levels was introduced this week by the JEDEC Solid State Technology Association in Arlington, Va., (formerly known as the Joint Electron Device Engineering Council) in Arlington, Va.

The standard is called e MMC v4.5, short for JESD84-B45: Embedded MultiMediaCard (e MMC), Electrical Standard (Version 4.5 Device). The guideline is part of the evolution of eoMMC as a memory industry standard for embedded non-volatile storage of system code, software applications, and user data, JEDEC officials say.

The e MMC v4.5 standard contains an interface bandwidth increase from 104 to 200 megabytes per second; Packed Commands in the command protocol that can group a series of commands in one data transaction; Context ID that groups different memory transactions under one ID; and Data Tag that ranks and targets specific write transactions to memory. The standard also has volatile data cache to reduce latency among data transactions.

Enhancements include power-off notification for safe power-down; dynamic device capacity to increase device life; and the ability to retrieve real-time clock information from the host system. The JESD84-B45 is available for free download at www.jedec.org/standards-documents/results/jesd84-b45.

For more information contact the JEDEC Solid State Technology Association online at www.jedec.org.