DARPA pushes new frontier of high-performance military computing to approach performance of one-quintillion calculations per second
ARLINGTON, Va., 22 June 2010. Computer scientists at the U.S. Defense Advanced Research Projects Agency (DARPA) in Arlington, Va., are asking industry for novel technologies and approaches that offer dramatic advances in high-performance military computer performance, and enable so-called extreme scale computing -- the notion of exceeding today's peta-scale computing to achieve one quintillion (1,000,000,000,000,000,000) calculations per second.
DARPA released a broad agency announcement Monday (DARPA-BAA-10-78) for the Omnipresent High Performance Computing (OHPC) program to help develop tomorrow's high-performance computers to meet the relentlessly increasing demands for greater performance, higher energy efficiency, ease of programmability, dependability, and security in aerospace and defense computing for military sensors, platforms, and missions.
The DARPA OHPC program is to provide new computer technologies for a similar DARPA initiative called the Ubiquitous High Performance Computing (UHPC) program to develop new classes of high-performance computing, from embedded computing to cabinet computing, with dramatically reduced power consumption while delivering a thousand-fold increase in processing capabilities. The UHPC program, under consideration now, is to develop adaptable and hardened cyber resilient computer systems that will not require significant system expertise.
The DARPA OHPC program seeks to speed-up the UHPC initiative with new research aimed at extreme scale computing, which also is known as exascale computing, and will develop technologies will be integrated into one or more UHPC systems.
Topics of interest in the OHPC program include software that not only reduces requirements for high performance computing, including memory and storage, but also that enables programmability to reduce the need for users to understand complex system aspects like heterogeneous cores and memory hierarchy; hardware and software for managing component failure rate, as well as shared information and responsibility among the operating system, runtime system, and applications; scalable I/O systems that may include alternatives to file systems; self-aware system software; programming models that allow developers to express their execution goals for achieving security, dependability, power efficiency and performance; and low-power circuits that can be used across multiple UHPC or extreme scale system designs.
Companies interested must respond initially by 6 Aug. 2010, and provide final proposals by 22 Dec. 2010. DARPA officials say they expect to award several contracts. For questions or concerns contact DARPA's William Harrod by e-mail at [email protected].
More information is online at https://www.fbo.gov/spg/ODA/DARPA/CMO/DARPA-BAA-10-78/listing.html.
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John Keller | Editor
John Keller is editor-in-chief of Military & Aerospace Electronics magazine, which provides extensive coverage and analysis of enabling electronic and optoelectronic technologies in military, space, and commercial aviation applications. A member of the Military & Aerospace Electronics staff since the magazine's founding in 1989, Mr. Keller took over as chief editor in 1995.
