TOKYO - Renesas Electronics Corporation announced the development of two 2.4 GHz RF transceiver technologies that support the Bluetooth Low Energy (LE) low-power, near-field communication standard. The new technologies also achieve a smaller mounting area and better power efficiency. Renesas presented these technologies at International Solid-State Circuits Conference 2022 (ISSCC 2022), held between February 20 and 24 in San Francisco.
IoT devices must provide flexible support for Bluetooth LE regardless of their implementation format. Renesas has developed two new technologies to address these requirements: 1) a matching circuit technology that covers a wide impedance range and enables the IC to match a variety of antenna and board impedances without an external impedance-matching circuit; 2) a signal correction technology for locally generated reference signals that uses a small circuit to self correct inconsistencies in the circuit elements and variations in surrounding conditions without calibration.
Renesas has verified the effectiveness of these technologies on a Bluetooth LE RF transceiver circuit prototype built with a 22-nm CMOS process. With these new technologies, Renesas reduced the circuit area including the power supply to 0.84 mm2, the world’s smallest for a device of this type. This was achieved by modifying the receiver architecture to reduce the number of inductors and making enhancements such as a low-current baseband amplifier with a small mounting area and a highly efficient class-D amplifier. They offer best-in-class power efficiency, with power consumption of 3.6 mW and 4.1 mW during reception and transmission respectively. These advances enable smaller size, reduced board cost, and lower power consumption, while simplifying the board design process.
The benefits of the new RF transceiver technologies are:
1. Matching Circuit Technology Covering Wide Impedance Range (On-chip Antenna Impedance Tuner, AIT)
The integrated impedance-matching circuit technology presented by Renesas at ISSCC 2015 enabled compact and low-cost Bluetooth LE products that required no external inductors or capacitors for switching between reception and transmission or impedance matching. However, depending on the type of antenna or board design considerations, the impedance did not necessarily reach 50 Ω and an external matching circuit was still needed. In addition, when using the earlier technology and adding a matching circuit with impedance-changing functionality, issues involving increased signal loss and inability to achieve a sufficient range of variation could still arise.
To address these issues, Renesas has developed a new variable impedance-matching circuit technology that consists of two inductors and four variable capacitors. The transmitter-side inductor and receiver-side inductor used in the matching circuit are configured in a concentric arrangement, and their mutual induction is employed to reduce signal loss and cut the effective parasitic capacitance. This both expands the variable impedance range and substantially shrinks the circuit area. A voltage standing wave ratio (VSWR), which indicates impedance mismatches, equivalent to maximum 6.8 and a variable impedance range of approximately 25 to 300 Ω have been confirmed.
2. Reference Signal Self-Correction Circuit Technology Eliminating Need for Calibration Circuit (Self-IQ-Phase Correction, SIQC)
A reference signal (locally generated signal) of roughly the same frequency as that of the wireless radio signals received via the antenna is generated internally by the RF transceiver. The signal is used to convert gigahertz-band wireless signals to low-frequency baseband signals. The accuracy of the reference signal can be degraded by factors such as inconsistencies in the circuit elements or variations in the temperature or supply voltage. In the past, the compensation technology for phase and amplitude deviations with a calibration circuit was used to accurately generate the reference signal. This led to problems, however, because integrating such a calibration circuit required a larger chip area, higher power consumption, and increased test cost.
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