VMETRO's serial FPDP IP core supports Xilinx Virtex-5 FPGAs

HOUSTON, 16 Sept. 2007. VMETRO in Houston is offering a serial FPDP IP core that supports Xilinx Virtex-5 field-programmable gate array (FPGA)-based products with RocketIO GTP multi-gigabit serial transceivers.

VMETRO's hardware and the FPDP IP core are for front panel optical and VITA-41 (VXS) backplane interconnects. Applications include real-time imaging, signal processing, high-speed data recording, and test systems.

The Serial FPDP IP core comes in either obfuscated source for simulation or in VHDL source. The core can be implemented on any VMETRO Virtex-5, Virtex-4, or Virtex-II Pro FPGA products that use RocketIO GTPs or MGTs.

Subject to licensing conditions, the core can also be used on non-VMETRO based Virtex-5, Virtex-4 and Virtex-II Pro based FPGA products.

For more information contact VMETRO online at www.vmetro.com.