Lockheed Martin to develop ASIC hardware to counter cyber vulnerabilities in military electronic systems
WRIGHT-PATTERSON AFB, Ohio – Trusted computing experts at Lockheed Martin Corp. will develop an application-specific integrated circuit (ASIC) with built-in cyber security capabilities to counter software cyber vulnerabilities in military and commercial electronic systems.
Officials of the U.S. Air Force Research Laboratory at Wright-Patterson Air Force Base, Ohio, announced a $13.6 million contract to the Lockheed Martin Rotary and Mission Systems segment in Owego, N.Y., late last month for the System Security Integrated Through Hardware and Firmware (SSITH) ASIC effort.
SSITH aims to secure computer hardware that constrains and reduces vulnerabilities to cyber attack and protects against software attacks that exploit hardware vulnerabilities. The Air Force Research Lab awarded the contract on behalf of the U.S. Defense Advanced research Projects Agency (DARPA) in Arlington, Va.
Electronic system security has become a critical area of concern for the U.S. Department of Defense (DOD) and the broader U.S. population, DARPA officials explain. Current cyber security efforts to provide electronic security largely rely on software, which can be inadequate if fails to address the underlying hardware vulnerability.
Creative hackers can develop new ways to exploit how software accesses hardware, which can start a continuous cycle of exploitation, patching, and subsequent exploitation. Instead, the DARPA SSITH program focuses on hardware security at the microarchitecture level.
Lockheed Martin was one of the nine original SSITH contractors named in early 2019. In addition to Lockheed Martin, the original SSITH contractors were Galois Inc. in Portland, Ore.; The Charles Stark Draper Laboratory in Cambridge, Mass.; SRI International in Menlo Park, Calif.; Cornell University in Ithaca, N.Y.; University of California-San Diego in La Jolla, Calif.; Columbia University in New York City; Massachusetts Institute of Technology (MIT) in Cambridge, Mass.; and University of Michigan in Ann Arbor, Mich.
The SSITH project is developing security approaches that will limit computer hardware to states that are secure while maintaining the system performance and power. The project uses architectures and design tools that enable system-on-chip (SoC) designers to safeguard hardware against all seven known common weakness enumeration (CWE) classes of hardware vulnerabilities that hackers can exploit through software.
SSITH architectures and design tools may provide flexible solutions applicable to DOD and commercial electronic systems. Security measures may include cryptography; metadata tagging; formal verification; verified state matching; anomalous state detection; secure multi-party computing; semi-homomorphic computing; and security through compartmentalization.
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Systems designers might eventually be able to use SSITH security architectures so that existing application software can run on secure hardware without software modification; some software modification may be necessary, however, to exploit hardware security features fully. SSITH architectures are expected to be scalable such that they can be useful for architectures ranging from small, ultra-low power systems to large, high-performance systems.
The SSITH program has two technical areas: scalable, flexible, and adaptable integrated circuit security architectures that can be implemented easily in DOD and commercial SoCs; and ways to evaluate these architectures.
For more information contact Lockheed Martin Rotary and Mission Systems online at www.lockheedmartin.com, or DARPA at www.darpa.mil.
John Keller | Editor-in-Chief
John Keller is the Editor-in-Chief, Military & Aerospace Electronics Magazine--provides extensive coverage and analysis of enabling electronics and optoelectronic technologies in military, space and commercial aviation applications. John has been a member of the Military & Aerospace Electronics staff since 1989 and chief editor since 1995.
