Perspecta Labs to speed complex application software with improvements to network interface cards (NICs)
ARLINGTON, Va. – Computer scientists at Perspecta Labs Inc. in Basking Ridge, N.J., are working with U.S. military researchers to explore ways of speeding-up complex application software like distributed training of machine learning classifiers.
Officials of the U.S. Defense Advanced Research Projects Agency (DARPA) in Arlington, Va. announced a $29.7 million contract to Perspecta Labs on Tuesday for a research project in the first phase of the DARPA Fast Network Interface Cards (FastNICs) program.
FastNICs seeks to find ways of improving network stack performance in military embedded computing systems to realize 100x or more throughput gains, and to accelerate distributed applications, such as training of deep neural networks.
Current network subsystems represent a bottleneck between multiprocessor servers and the network links that interconnect them, DARPA officials explain. This bottleneck has worsened dramatically over time because of the increasing use of parallelism in processor design aimed at increasing central processing unit (CPU) performance.
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Although this design strategy can be effective for CPUs, it has limited overall computer performance because network link performance has not matched processor gains; there is a performance imbalance between network links and other computer system components, researchers explain.
The separate evolutions of network and server technology have made network interface cards (NICs), which bridge the network/server boundary, an afterthought.
This can be a problem because network interface hardware imposes the upper bound for server throughput, as it limits a processor’s data-ingest capability. Limitations in server memory technologies, software that exhibits excessive memory copying, and poor application design also can throttle computer throughput.
Network interface cards (NICs) typically operate at far slower rates than today’s multicore multiprocessors and graphic processing unit (GPU)-equipped servers, which highlights the need for breakthrough approaches in increasing NIC speeds.
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The DARPA FastNICs project seeks to speed-up applications such as the distributed training of machine learning classifiers by 100x by developing new network subsystem designs.
The program focuses on overcoming the gross mismatches in computing and network subsystem performance -- especially computer network interface performance, which lags computer subsystems like RAM and CPU by three to four orders of magnitude, DARPA researchers say.
FastNICs is a four-year program organized into three phases. The first two-year phase will develop a small-scale proof-of-concept that integrates hardware, system software, and application software, with an goal of producing a 5x application speedup over the current state of the art.
The second one-year phase will focus on scaling-up proof-of-concept technology. The one-year third phase aims at a 4x application speedup over the second phase.
The project also has three technical areas: network subsystem hardware and software; applications; and independent test and evaluation.
Network subsystem hardware and software focuses on improving raw server data path speed by demonstrating 10-terabit-per-second network interface hardware using existing or road-mapped hardware interfaces.
Applications seeks new software that fast server data paths enable by implementing at least one application that demonstrates a 100x speedup when executed on the hardware/software stack developed in the project's first phase. Independent test and evaluation seeks to provide objective and convincing evidence for the impact of FastNICs.
On this contract Perspecta Labs will do the work in Basking Ridge, N.J., and should be finished by May 2024. For more information contact Perspecta Labs online at www.perspectalabs.com, or DARPA at www.darpa.mil.
John Keller | Editor-in-Chief
John Keller is the Editor-in-Chief, Military & Aerospace Electronics Magazine--provides extensive coverage and analysis of enabling electronics and optoelectronic technologies in military, space and commercial aviation applications. John has been a member of the Military & Aerospace Electronics staff since 1989 and chief editor since 1995.
